USB VBUS over voltage issue.

We encounter USB VBUS over voltage issue. With my friend Leo’s great help! I was able to figure out what happens on this issue.

· When we plug in USB cable, we will see over voltage on VBUS, below figure shows peak voltage approach 11.63v, which is much high than VBUS pad tolerance.

· The USB chip, VBUS maximum rating is 5.8V and it add an avalanche diode between VBUS and GND. I have checked the spec of SP0503BA; the clamp voltage is 6.8V typical value which is higher than VBUS maximum rating.

· The voltage overshoot will always happen because all USB cables have inductance with them. Normally, the inductance is around 1uH to 10uH(Lout). We have 1.0uF ceramic input capacitor (Cin) on VBUS. When USB plug in, Cin will ramp up toward 5V input voltage. Once the voltage across Cin has reached the 5v, the energy stored in Lout will raise the voltage across Cin further above 5V. The voltage across Cin will eventually reach its peak and will then fall back to 5V. Refer to Linear Technology Application Note 88, entitled “Ceramic Input Capacitors Can Cause Overvoltage Transients” for a detailed discussion of this problem.

· So I have made some tests on demo board.
o I added a 10uH inductance in series with VBUS to simulate long USB cable.
I used Agilent E3631A to supply 5v in this test. My desktop USB VBUS voltage is around 5.18v. So I set output voltage as 5.15V. And the maximum voltage I captured on VBUS is 6.54V which is higher than VBUS pad voltage rating. Here is the waveform.

o And then I added 1 Ohm resistor in series with ceramic capacitor C6 in CP2104 demo board to decrease the inrush current. And with the modification, the maximum voltage on VBUS is 5.74V which is lower than VBUS voltage rating. Below is the SCH.

o There is an explanation on this.” The long cable lengths of most wall adapters and USB cables make them especially susceptible to this problem. To bypass the USB pin and the wall adapter input, add a 1Ω resistor in series with a ceramic capacitor to lower the effective Q of the network and greatly reduce the ringing. A tantalum, OS-CON, or electrolytic capacitor can be used in place of the ceramic and resistor, as their higher ESR reduces the Q, thus reducing the voltage ringing.”

o Here is the waveform I captured

o This trace shows the clean response resulting from the addition of the 1Ω resistor.