One customer asked question about whether there is an issue about ground
bounce in 300mA I/O output pin. I have checked some materials about
ground bounce, this one is good. http://www.ultracad.com/articles/g_bounce.pdf
So one response is "Our high current drivers have both programmable
current limiting and four levels of programmable slew rate, which can
mitigate the effects of ground bounce. If you set the slew rate limiting
to the slowest setting, you will have no ground bounce issues if the
MCU is properly grounded and you are driving a capacitive
(non-inductive) load." It is impressive.
Apr 12, 2012
Mar 14, 2012
SiM3U1xx-power-mode-9
Introduction
SiM3U1xx and
SiM3C1xx devices have several power modes: Normal, Power Mode 1; Power Mode 2,
Power Mode 3 Fast Wake, Power Mode 3, Power Mode 9(PM9). We will discuss PM9 in
this documents.
Function Description
In Power Mode 9, the
core and all peripherals are halted, all clocks are stopped, and the pins and
peripherals are set to a lower power mode. In addition, standard RAM contents
are not preserved, though retention RAM contents are still available after
exiting the power mode. This mode provides the lowest power consumption for the
device, but requires an appropriate reset to exit. The available reset sources
to wake from PM9 are controlled by the Power Management Unit (PMU).
To enter this mode, firmware should first set the PMSEL bit
in the RSTSRC_CONFIG register to 1, and write the SLEEPDEEP bit in the ARM
System Control Register. Firmware must then execute a WFI or WFE instruction.
The core will remain in PM9 until an enabled reset source occurs.
The reset wake for PM9 can be sourced from pins (Pin Wake),
the Low Power Timer, Comparator 0, RTC0 Alarms (0, 1, or 2), RTC0 Fail, or the
Reset Pin (RESET). In most cases, the corresponding interrupt enable must be
set in the module in order for an event to be a wakeup source. The Comparator
module is the exception and the wakeup event will occur even if the interrupt
is disabled. These wakeup sources (except for the reset pin) can also be optionally
used to reset RTC0 or the Low Power Timer while the device remains in PM9.
Firmware can check the PM9EF bit during the initialization
sequence to determine if the device reset because of a wake from Power Mode 9.
If the device did reset because of a wake from PM9, firmware must clear the
bits keeping the peripheral and pin interfaces in a lower power state (PERILPEN
and PINLPEN), and the WAKESTATUS register provides status flags to indicate the
wakeup source. The WAKESTATUS register can be cleared by writing 0 to the
WAKECLR bit.
Code Implementation
We made little
modification in “Sleep” example code to realize PM9.
void gPB_enter_default_config()
{
// START APB
CLK AND ENABLE SW PRINF
SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0,
SI32_CLKCTRL_A_APBCLKG0_PB0);
SI32_PBSTD_A_set_pins_push_pull_output (SI32_PBSTD_1, 0x00000008);
// ENABLE
CROSSBAR 1. WE WILL DRIVE LED's, SAMPLE BUTTONS, AND USE UART ON XBAR1
SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0);
// ENABLE LED
DRIVERS (P2.10, P2.11) and turn on P2.10
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000C00);
SI32_PBSTD_A_write_pins_low(SI32_PBSTD_2, 0x400);
// ENABLE
SWITCH SENSING (P2.10, P2.11)
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_2, 0x00000300);
// RTC PORT
SETUP
// RTC PINS
TO ANALOG (PB0.9, PB0.10)
SI32_PBSTD_A_set_pins_analog(SI32_PBSTD_0, 0x00000600);
// BRING OUT
RTC0 (PB2.7) (push-pull, P2.0-P2.6 skiped, RTC0 output enabled in
crossbar)
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x00000080);
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_2, 0x0000007F);
SI32_PBCFG_A_enable_xbar1_peripherals(SI32_PBCFG_0,
SI32_PBCFG_A_XBAR1_RTC0EN);
// UART PINS
TO PROPER CONFIG (TX = PB1.12, RX = PB1.13)
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x0001000);
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_1, 0x00002000);
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_0, 0x0000FFFF);
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_1, 0x00000FFF);
// BRING OUT
UART
SI32_PBCFG_A_enable_xbar0h_peripherals(SI32_PBCFG_0,
SI32_PBCFG_A_XBAR0H_UART0EN);
}
2.
Added code to enter PM9. And added code to check
reset source and wakeup source. Handle with exiting from PM9. (gPMU.c)
// CHECK FOR
POR
if
(SI32_PMU_A_is_power_on_reset_event_flag_set(SI32_PMU_0))
{
//
IMMEDIATLY CLEAR POR SO ANY UNEXPECTED RESET WILL BE PROPERLY DECODED
SI32_PMU_A_clear_por_flag(SI32_PMU_0);
// SET
VARIABLES
reset_source = SI32_POWER_ON_RESET;
wakeup_source = SI32_NO_WAKEUP;
// APP BUILDER
INSERTS USER FUNCTON OR DEFAULT FUNCTION HERE
gModes_enter_my_default_mode();
SI32_PMU_A_clear_pin_level_shifter_hold(SI32_PMU_0);
return;
}
else if
(SI32_PMU_A_is_wakeup_event_flag_set(SI32_PMU_0))
{
SI32_PMU_A_clear_wakeup_flags(SI32_PMU_0);
reset_source
= SI32_PMU_WAKEUP_RESET;
wakeup_source = SI32_RESET_WAKEUP;
gModes_enter_my_default_mode();
SI32_PMU_A_clear_pin_level_shifter_hold(SI32_PMU_0);
return;
}
void pmu_sleep_now(void)
{
// SAFTY CODE
TO BE REMOVED LATER.
// GROUNDING
PB3.0 WILL CAUSE THE PART TO NOT GO TO SLEEP
SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0);
SI32_PBSTD_A_set_pins_digital_input(SI32_PBSTD_3, 0x00000001);
if
(SI32_PBSTD_A_read_pins(SI32_PBSTD_3) & 0x00000001)
{
// CLEAR WAKUP SOURCES
SI32_PMU_A_clear_wakeup_flags(SI32_PMU_0);
SI32_RSTSRC_A_enable_power_mode_9(SI32_RSTSRC_0);
// SET
DEEPSLEEP in SCR (and service all pending interrutps before sleep
SCB->SCR
= 0x14;
__set_FAULTMASK(1);
__WFI();
}
}// pmu_sleep_now();
//------------------------------------------------------------------------------
void pmu_enter_sleep_till_reset_config(void)
{
// DISABLE
all wakeup sources
SI32_PMU_A_write_wakeen(SI32_PMU_0, 0x0);
// ENABLE
Reset PIN as wake event
SI32_PMU_A_enable_reset_pin_wake_event(SI32_PMU_0);
}
//------------------------------------------------------------------------------
void pmu_enter_sleep_till_alarm_config(void)
{
// DISABLE
all wakeup sources
SI32_PMU_A_write_wakeen(SI32_PMU_0, 0x0);
// ENABLE
RTC_Alarm as wake event
SI32_PMU_A_enable_rtc0_alarm_wake_event(SI32_PMU_0);
}
3.
Add RTC startup code, which needed by our PM9
reset source. (gRTC.c)
void gRtc0_enter_running_config(void)
{
// ENABLE RTC
CLOCK (+ IVC0 EXTVREG0 LPOSC0 EXTOSC0 LDO VREG0 VMON0)
SI32_CLKCTRL_A_enable_apb_to_modules_1(SI32_CLKCTRL_0,
SI32_CLKCTRL_A_APBCLKG1_MISC0);
// SETUP RTC
SI32_RTC_A_enable_module(SI32_RTC_0);
SI32_RTC_A_enable_crystal_oscillator(SI32_RTC_0);
SI32_RTC_A_set_clock_source_rtc(SI32_RTC_0);
SI32_RTC_A_disable_bias_doubler(SI32_RTC_0);
SI32_RTC_A_enable_autostep(SI32_RTC_0);
SI32_RTC_A_enable_auto_gain_control(SI32_RTC_0);
// START RTC
AND WAIT FOR LOADCAP TO SETTLE
SI32_RTC_A_start_timer(SI32_RTC_0);
while(!SI32_RTC_A_is_load_capacitance_ready(SI32_RTC_0));
SI32_RTC_A_clear_oscillator_fail_flag(SI32_RTC_0);
}
4.
Add code to check reset source and check
retention ram and standard ram value.(main.c)
int main()
{
// msTicks
increments every 1ms (1Khz). Driven by boot osc (myCpu.c)
// _last
variables store the last seen state of variables so we know when they have
changed
uint32_t
msTicks_last;
// Keeps
track of when button was depressed
uint32_t
hold_start = 0;
uint32_t volatile
*retention_ram = (uint32_t *)(0x20000000);
uint32_t volatile
*standard_ram = (uint32_t *)(0x20003000);
// Setup the
device in a mode depending on the reset/wakeup source
setup_device();
if
(SI32_POWER_ON_RESET == get_pmu_reset_source())
{
signal_POR();
retention_ram[0] = 0x12345678;
retention_ram[1] = 0xabcdef01;
} else
if (SI32_PIN_RESET == get_pmu_reset_source()) {
signal_button_reset();
while
(SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 8));
if((retention_ram[0]
== 0x12345678) && (retention_ram[1] == 0xabcdef01)) {
blink_3(0x800);
} else {
blink_3(0x400);
}
while
(SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 8));
if((standard_ram[0]
== 0x12345678) && (standard_ram[1] == 0xabcdef01)) {
blink_3(0x800);
} else
{
blink_3(0x400);
}
} else
if (SI32_RESET_WAKEUP == get_pmu_wakeup_source()) {
signal_reset_wake();
while
(SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 8));
if((retention_ram[0]
== 0x12345678) && (retention_ram[1] == 0xabcdef01)) {
blink_3(0x800);
} else {
blink_3(0x400);
}
while
(SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 8));
if((standard_ram[0]
== 0x12345678) && (standard_ram[1] == 0xabcdef01)) {
blink_3(0x800);
} else
{
blink_3(0x400);
}
} else {
//PANIC
(TURN OFF LEDS AND SPIN)
SI32_PBSTD_A_write_pb(SI32_PBSTD_2, 0xFFFF);
while(1);
}
standard_ram[0] = 0x12345678;
standard_ram[1] = 0xabcdef01;
//PERFORM THE
FOLLOWING TASKS FOREVER
hold_start =
0;
while
(1) {
// If
msTicks has changed
if
(get_msTicks() != msTicks_last) {
// IF
PB2.9 BUTTON PRESSED
if
(!SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 9))
{
//
if start of button hold not logged then log it
if(!hold_start) {
hold_start = get_msTicks();
}
}
// IF
BUTTON PB2.9 NOT PRESSED
if
(SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 9))
{
//
if the button was pressed
if(hold_start
> 0) {
sleep_for_ms(get_msTicks() - hold_start);
}
}
// IF
PB2.8 BUTTON PRESSED
if
(!SI32_PBSTD_A_read_pin(SI32_PBSTD_2, 8))
{
//
Sleep till reset pressed
sleep_till_reset();
}
// save
current msTicks value as last seen
msTicks_last = get_msTicks();
}// if
msTicks changed
}// while(1)
}// main()…
Function validation
If POR occurs, both LEDs (DS3, DS4) will
blink, we will store data in retention ram and standard ram. There are two
options:When you press SW2(PB2.8), it will enter PM9 mode till reset; When you
press SW3(PB2.9), it will enter PM9 mode till alarm, the alarm time is the time
you press on SW3, and then wake up. Both option are turn on yellow LED(DS4)
when enter PM9 mode.
If Reset wake
occurs, yellow LED (DS4) will blink, it indicates exit from PM9.
If button reset
occurs, red LED (DS3) will blink, it indicates it is reset.
Both above reset
occur, we need to check retention ram and standard ram value. First, Press SW2(PB2.8), it read out
retention ram data and check whether it equal our preset value. If the value
matched, it will blink yellow LED(DS4). If the value doesn't match, it will
blink red LED(DS3). And then press SW2(PB2.8) again, it read out standard ram
data check whether it equal our pre-set value.
If the value matched, it will blink yellow LED(DS4). If the value
doesn't match, it will blink red LED(DS3). After checking ram data, we call
choose two options by pressing SW2 or SW3.
References
1.
SiM3U1xx/SiM3C1xx Reference Manual: downloadable
from the Silicon Labs web site at http://www.silabs.com/pages/DownloadDoc.aspx?FILEURL=Support
Documents/TechnicalDocs/SiM3U1xx_SiM3C1xx_RM.pdf&src=DocumentationWebPart
2.
SiM3U1xx Data Sheet: downloadable from the
Silicon Labs web site at http://www.silabs.com/pages/DownloadDoc.aspx?FILEURL=Support
Documents/TechnicalDocs/SiM3U1xx.pdf&src=DocumentationWebPart
Mar 12, 2012
SiM3U1xx-current-mode-dac
Introduction
SiM3U1xx and
SiM3C1xx include current mode digital-to-analog converter (IDAC) module. The IDAC takes a digital value as an input
and outputs a proportional constant current on a pin.
Function Description
The IDAC module includes
the following features: 10-bit current
DAC with output update trigger source options. Support for three full-scale
output mode: 0.5, 1.0 and 2.0mA. Four-word FIFO to aid with high-speed waveform
generation or DMA interactions. Ability
to update on rising, falling, or both edge for any of the external I/O trigger
sources (DACnTx).
The various IDAC features and modes are enabled using the CONTROL
register. There are four different modes: on-demand mode, periodic FIFO wrap
mode, period FIFO-only mode, and periodic DMA mode.
The IDAC full scale
current output is configured using the OUTMD bit field. There are nominally
2.046, 1.023 and 0.5115 mA.
Optionally, and
on-chip load resistor can be enabled by setting the LOADEN bit. This enables an
impedance path to ground which effectively produces a voltage at the output
pin.
IDAC conversions can be triggered “on-demand” with a write
to the DATA register, or periodically using one of the internal timer options
or external conversion trigger inputs.
We can have a look on below table for quick-reference on
IDAC operation. That is very useful for setting up IDAC correctly.
And here we have a look on IDAC electrical parameters in
below table.
Code Implementation
We used AppBuilder
to generate basic code we need, and then added necessary code to make
temperature sensor works.
void CLKCTRL_setup_default_mode_clock_gates(void)
{
SI32_CLKCTRL_A_enable_apb_to_modules_0(SI32_CLKCTRL_0,
SI32_CLKCTRL_A_APBCLKG0_PB0 |
SI32_CLKCTRL_A_APBCLKG0_TIMER0 |
SI32_CLKCTRL_A_APBCLKG0_IDAC0);
SI32_CLKCTRL_A_enable_ahb_to_dma_controller(SI32_CLKCTRL_0);
}
2.
Enable on-chip load resistor; set GAINADJ as 16,
this value is well match with theory and measure result; enable IDAC module; set output full-scale
current output as 2mA ; and external trigger source use default setting which
is PB3.2 with SiM3U1x7/C1x7
package.(gIDAC0.c)
void IDAC0_enter_default_mode_from_reset(void)
{
SI32_IDAC_A_enable_load_resistor(SI32_IDAC_0);
SI32_IDAC_A_set_output_fullscale_adjust(SI32_IDAC_0, 16);
SI32_IDAC_A_enable_module(SI32_IDAC_0);
SI32_IDAC_A_select_output_fullscale_2ma(SI32_IDAC_0);
}
3.
Port bank configuration. PB0.13 selected as
IDAC0 output pin need to be skipped in
crossbar, P3.2 selected as external
trigger source and need to be skipped in crossbar.(gPB.c)
void pb_enter_default_mode_from_reset(void)
{
SI32_PBCFG_A_unlock_ports(SI32_PBCFG_0);
// PB0 Setup
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_0, 0x2000);
// PB1 Setup
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_1, 0x0008);
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_1, 0x0008);
// Enable
Crossbar0 signals & set properties
SI32_PBCFG_A_enable_crossbar_0(SI32_PBCFG_0);
// PB2 Setup
SI32_PBSTD_A_set_pins_push_pull_output(SI32_PBSTD_2, 0x0C00);
SI32_PBSTD_A_set_pins_high_drive_strength(SI32_PBSTD_2, 0x0C00);
// PB3 Setup
SI32_PBSTD_A_write_pbskipen(SI32_PBSTD_3, 0x0004);
// Enable
Crossbar1 signals & set properties
SI32_PBCFG_A_enable_crossbar_1(SI32_PBCFG_0);
}
4.
IDAC On-demand mode.
a.
Set output update trigger with “the IDAC output updates on write to
DATA (On Demand“, data format is single 10 bit and right-justified as default setting.(myIDAC0.c)
void myIDAC0_enter_demand_mode(void)
{
SI32_IDAC_A_set_output_update_trigger(SI32_IDAC_0, SI32_IDAC_A_CONTROL_OUPDT_DACNT15_VALUE);
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x01F40190);
}
b. Fetch
data to IDACn_DATA register every 2 seconds, On-Demand mode, writes to this IDACn_DATA
register update the IDAC value immediately, (main.c)
void IDAC0_demand_mode_fetch_data()
{
uint32_t i,
ms_ticks = 500;
while
(1) {
for
(i = 0; i < 1024; i += 100) {
while
(ms_ticks > get_msTicks()) {
}
ms_ticks =
get_msTicks() + 2000;
blink_led();
printf("Output
current is %d uA\n", fullscale_current * i / 1024);
SI32_IDAC_A_write_data(SI32_IDAC_0, i);
}
}
}
5.
IDAC FIFO wrap mode
a.
Set data format as two 10 bit samples and
right-justified; set the IDAC output updates on the falling edge of PB3.2;
enabled FIFO wrap and reset FIFO before we access it.(myIDAC0.c)
void myIDAC0_enter_fifo_wrap_mode(void)
{
SI32_IDAC_A_select_2x10bit_input_format(SI32_IDAC_0);
SI32_IDAC_A_set_output_update_trigger(SI32_IDAC_0, SI32_IDAC_A_CONTROL_OUPDT_DACNT13_VALUE);
SI32_IDAC_A_enable_buffer_wrap(SI32_IDAC_0);
SI32_IDAC_A_reset_buffer(SI32_IDAC_0);
}
b.
In this mode, the IDAC will continuously pull
from the four-sample FIFO in a circular fashion. We only need to send data once
to FIFO. Since we use two 10 bit samples format, for 4 words FIFO, we only need
write two values to data register. (main.c)
void IDAC0_fifo_wrap_mode_fetch_data()
{
//
we set two 10 bit format, so we only need write data register twice
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x01F40190);
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x02BC0258);
printf("P3.2 falling edge will trigger IDAC0 fifo wrap mode
output\n");
}
6.
IDAC FIFO-only mode
a.
Set data
format as single 10 bit sample and right-justified; set the IDAC output updates
on the falling edge of PB3.2; Reset FIFO before we access it; enable FIFO went
empty interrupt and 2nd level interrupt handler function.(myIDAC0.c)
void myIDAC0_enter_fifo_only_mode(void)
{
SI32_IDAC_A_set_output_update_trigger(SI32_IDAC_0,
SI32_IDAC_A_CONTROL_OUPDT_DACNT13_VALUE);
SI32_IDAC_A_reset_buffer(SI32_IDAC_0);
SI32_IDAC_A_enable_buffer_went_empty_interrupt(SI32_IDAC_0);
NVIC_ClearPendingIRQ(IDAC0_IRQn);
NVIC_EnableIRQ(IDAC0_IRQn);
}
void IDAC0_empty_handler(void)
{
int
i;
SI32_IDAC_A_clear_buffer_went_empty_interrupt(SI32_IDAC_0);
for (i = 0; i < 4; i++) {
idac_output_current = (idac_output_current + 100) & 0x3FF;
SI32_IDAC_A_write_data(SI32_IDAC_0,idac_output_current);
}
}
b.
In this mode, firmware will initiate a new write
to the FIFO in went empty interrupt handler function. We still need to full
fill FIFO when initialize IDAC module. (main.c)
void IDAC0_fifo_only_mode_fetch_data()
{
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x0190);
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x01F4);
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x0258);
SI32_IDAC_A_write_data(SI32_IDAC_0, 0x02BC);
printf("P3.2 falling edge will trigger IDAC0 fifo only mode
output\n");
}
7.
IDAC DMA mode
a.
Set data format as single 10 bit sample and
right-justified; set the IDAC ouput updates on the falling edge of PB3.2; Reset
FIFO before we access it; enable FIFO interrupt and 2nd level
interrupt handler function (myIDAC0.c)
void myIDAC0_enter_dma_mode(void)
{
SI32_IDAC_A_set_output_update_trigger(SI32_IDAC_0,
SI32_IDAC_A_CONTROL_OUPDT_DACNT13_VALUE);
SI32_IDAC_A_reset_buffer(SI32_IDAC_0);
NVIC_ClearPendingIRQ(IDAC0_IRQn);
NVIC_EnableIRQ(IDAC0_IRQn);
idac_dma_mode_flag = 1;
}
void IDAC0_empty_handler(void)
{
int
i;
SI32_IDAC_A_clear_buffer_went_empty_interrupt(SI32_IDAC_0);
idac_dma_complete = 1;
SI32_IDAC_A_disable_buffer_went_empty_interrupt(SI32_IDAC_0);
}
b.
Setup DMA base address; set DMA crossbar channel
3 as IDAC0 data request service; Enable the DMA channel; Setup DMA description
configure, such as DMA count, DMA input data and destination endpoint. Enable
DMA module; Start IDAC DMA transfer; Enable IDAC went empty interrupt.
(myIDAC0.c)
void myIDAC0_initialize_dma_transfer(void)
{
uint32_t ch;
SI32_IDAC_A_reset_buffer(SI32_IDAC_0);
printf("Initialize IDAC0 DMA transfer\n");
SI32_DMACTRL_A_write_baseptr(SI32_DMACTRL_0, (uint32_t)desc_pri);
ch
= SI32_DMAXBAR_A_select_channel_peripheral(SI32_DMAXBAR_0,
SI32_DMAXBAR_CHAN3_IDAC0);
SI32_DMACTRL_A_enable_channel(SI32_DMACTRL_0, ch);
SI32_DMADESC_A_configure(&desc_pri[3], idac_input_data,
SI32_IDAC_0_TX_ENDPOINT, IDAC_DMA_COUNT, SI32_DMADESC_A_CONFIG_WORD_TX);
SI32_DMACTRL_A_enable_module(SI32_DMACTRL_0);
idac_dma_complete = 0;
SI32_IDAC_A_start_dma_operation(SI32_IDAC_0);
SI32_IDAC_A_clear_buffer_went_empty_interrupt(SI32_IDAC_0);
SI32_IDAC_A_enable_buffer_went_empty_interrupt(SI32_IDAC_0);
}
c.
In this mode, we only need call DMA initialize
function.(main.c)
void IDAC0_dma_mode_fetch_data()
{
myIDAC0_initialize_dma_transfer();
while (idac_dma_complete == 0) {
}
printf("IDAC dma mode transfer done!\n");
}
Function validation
1.
Use HP
34401A Multimeter, select DC current measurement function. Connect wires to MCU CARD IDAC0(PB0.13) pin(in
"ANALOG" area) and GND.
2.
Connect a
wire to PB3.2 pin with series-connected 1K resistor, we will connect another
ends of the wire to generate falling edge event.
3.
Download the code to a SiM3U1xx device on a
SiM3U1xx MCU Card
4.
Run the code and use HP 34401A Multimeter
observe the IDAC0 output constant current. For On-Demand mode, we can see
output current value update in console windows in IDE every 2 seconds; For
other modes, we need generate P3.2 falling edge event by pulling down voltage
level, we can observe that output constant current change at each falling
edge.
References
1.
SiM3U1xx/SiM3C1xx Reference Manual: downloadable
from the Silicon Labs web site at http://www.silabs.com/pages/DownloadDoc.aspx?FILEURL=Support
Documents/TechnicalDocs/SiM3U1xx_SiM3C1xx_RM.pdf&src=DocumentationWebPart
2.
SiM3U1xx Data Sheet: downloadable from the
Silicon Labs web site at http://www.silabs.com/pages/DownloadDoc.aspx?FILEURL=Support
Documents/TechnicalDocs/SiM3U1xx.pdf&src=DocumentationWebPart
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