WINCE build option.

1.Sysgen to build image when you change the catalog.
2.Build and Sysgen. Build OS kernel and Sysgen, it tooks too much time
3.Build and Sysgen CurrentBSP. Build if you only change platform BSP code, the speed is fast.

When I change config.bib for memory map, with Build and Sysgen CurrentBSP, it does not generate correct image. I found config.bib in release directory is old on. I run "Copy file to release directory" and then run "Build and Sysgen CurrentBSP" and get correcty image.
If you only change one device driver, you can select the "Build project" and then run "Make runtime image", then you can fastest get image.

PWM setting

SDK setting is too complex, re-organize it.
void backlight_test()
{
unsigned int i,temp;

(*(volatile unsigned int *) HW_PINCTRL_MUXSEL4_CLR_ADDR) = (3<<4); // GPIO config as PWM2
(*(volatile unsigned int *) HW_PWM_ACTIVE2_CLR_ADDR) = 0; // clear count of inactive and active
(*(volatile unsigned int *) HW_PWM_ACTIVE2_SET_ADDR) = 0x00210000; // set active and inactive count
(*(volatile unsigned int *) HW_PWM_PERIOD2_CLR_ADDR) = 0; // clear
(*(volatile unsigned int *) HW_PWM_PERIOD2_SET_ADDR) = 0x000B002F; // set MATT,CDIV,INACTIVE,ACTIVE,PERIOD
(*(volatile unsigned int *) HW_CLKCTRL_XTAL_CLR_ADDR) = 0x20000000; // Clear the gate
(*(volatile unsigned int *) HW_PWM_CTRL_CLR_ADDR) = 0x40000000; // Clear the clock gate
(*(volatile unsigned int *) HW_PWM_CTRL_SET_ADDR) = (1<<5); // PWM2_ANA_CTRL_ENABLE
(*(volatile unsigned int *) HW_LRADC_CTRL0_CLR_ADDR)= 0xC0000000; // LRADC RST and gate clear
(*(volatile unsigned int *) HW_LRADC_CTRL2_CLR_ADDR)= 0x00200000; // LRADC1 feedback control

temp = (*(volatile unsigned int *) HW_LRADC_CTRL2_ADDR) & 0x001F0000;
for(i=0;i<=100;i+=10)
{
(*(volatile unsigned int *) HW_LRADC_CTRL2_ADDR) = temp | ((0x1C*i/100) << 16);
(*(volatile unsigned int *) HW_PWM_CTRL_SET_ADDR) = 0x4; // Pwm2 enable
(*(volatile unsigned int *) HW_LRADC_CTRL2_SET_ADDR) = 0x00400000; // BL enable
}
}